Apparatus for appending cyclic redundancy check in communication system

ABSTRACT

The apparatus for appending CRC to the data or signaling to be transmitted in the communication systems is proposed in present invention. If the length of the CRC-bit sequence is 16, one of the CRC generation polynomials listed in present invention can be adopted. If the length of the CRC bit sequence is 18, one of the CRC generation polynomials listed in present invention can be adopted. If the length of the CRC bit sequence is 20, one of the CRC generation polynomials listed in present invention can be adopted. With the optimized CRC generation polynomials proposed in present invention, mistakes in signaling detection can be effectively reduced so that system spectrum utility can be improved.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a communication system, especially toan apparatus for appending cyclic redundancy check apparatus in thecommunication system.

2. Description of the Related Art

Now, 3GPP (the 3^(rd) Generation Mobile Communication System PartnershipProject) Standardization Organization has commenced on Long-termEvolution (referred to as LTE) to existing system criteria. Amongnumerous physical layer transmission techniques, both a downlinktransmission technique based on OFDM (Orthogonal Frequency DivisionMultiplexing) and an uplink transmission technique based on SCFDMA(Single Carrier Frequency Division Multiple Access) are in hot research.In nature, OFDM is a multi-carrier modulation communication technique.Its basic principle is to divide a high rate data stream into multiplelow rate data streams to transmit via a group of orthogonal sub-carrierssimultaneously. Because of the nature of multi-carrier, the OFDMtechnique bears superior performance in many aspects. SCFDMA isessentially a single carrier transmission technique with comparativelylower PAPR (Peak to Average Power Ratio). Therefore, the power amplifierof a mobile terminal can be operated effectively to enlarge the cellcoverage. In addition, with the adoption of cyclic prefix and frequencydomain filtering, SCFDMA technique bears comparatively lower processingcomplexity.

The cyclic redundancy check (CRC) is a hash function for generating afew fixed number of data bits according to data such as network datapackets or computer file bock. It is adopted to detect possible errorfor data transmission or data storage. CRC is calculated before the datatransmission or data storage and is appended at the end of the data. Andin a receiver, the data is checked whether it is changed or not.

One CRC calculation is as follows. Suppose sequence a₀, a₁, a₂, a₃, . .. , a_(A−1) is input into a CRC calculation module and a generatedcheck-bit sequence is p₀, p₁, p₂, p₃, . . . , p_(L−1), where A indicatesa length of the input sequence, and L indicates a length of thecheck-bit sequence. Then, a sequence appended with check bits is a₀, a₁,a₂, a₃, . . . , a_(A−1), p₀, p₁, p₂, p₃, . . . , p_(L−1). The check bitsare calculated as follows: in GF(2), a polynomial expression

a₀D^(A+L−1)+a₁D^(A+L−2)+ . . . +a_(A−1)D^(L)+p₀D^(L−1)+p₁D^(L−2)+ . . .+p_(L−2)D¹+p_(L−1) is divided by corresponding generation polynomial,and a remainder must be zero.

At present, the CRC generation polynomials applied in LTE are asfollows: if the length of CRC L=16, the CRC generation polynomialg_(CRC16)(D)=D¹⁶+D¹²+D⁵+1; if the length of CRC L=24, the CRC generationpolynomials areg_(CRC24A)(D)=D²⁴+D²³+D¹⁸+D¹⁷+D¹⁴+D¹¹+D¹⁰+D⁷+D⁶+D⁵+D⁴+D³+D+1 andg_(CRC24B)(D)=D²⁴+D²³+D⁶+D⁵+D+1.

In current LTE, a DCI processing flow is illustrated in FIG. 1. Inmodule 101, DCI adds the CRC in the data sequence. Suppose loadinformation for PDCCH is a₀, a₁, a₂, a₃, . . . , a_(A−1). The check-bitsequence generated according to the CRC generation polynomial is p₀, p₁,p₂, p₃, . . . , p_(L−1), where A indicates the length of the loadinformation and L indicates the length of the check-bit sequence.Suppose the sequence appended with CRC is b₀, b₁, b₂, b₃, . . . ,b_(B−1), where B=A+L. Then the relationships between a_(k), b_(k) andp_(k) are as follows:

b_(k) = a_(k)  k = 0, 1, 2, …  , A − 1b_(k) = p_(k − A)  k = A, A + 1, A + 2, …  , A + L − 1

After appending the CRC, a scrambling process is performed on the CRCcheck-bit sequence with the user equipment (UE) ID sequence x_(ue,0),x_(ue,1), . . . , x_(ue,15) to form a sequence c₀, c₁, c₂, c₃, . . . ,c_(B−1). The relationship between b_(k) and c_(k) is as follows:

$\begin{matrix}{{c_{k} = {{b_{k}\mspace{14mu} k} = 0}},1,2,\ldots \mspace{14mu},{A - 1}} & \; \\{{c_{k} = {{( {b_{k} + x_{{ue},\; {k - A}}} ){mod}\mspace{11mu} 2\mspace{14mu} k} = A}},{A + 1},\; {A + 2},\ldots \mspace{14mu},{A + 15}} & \;\end{matrix}$

A channel coding is performed on the sequence c₀, c₁, c₂, c₃, . . . ,c_(B−1) in module 102. In LTE, a convolution coding scheme is applied. Arate matching is performed on the encoded data in module 103.

At present, an existed problem is that the adopted CRC generationpolynomial is not optimal. Suppose the length of the load informationfor the PDCCH is A and L is the length of the check-bit sequence. Thenthe CRC corresponds to a linear block code (A+L, A). One technical indexof the CRC generation polynomial is P_(ue). P_(ue) can be defined as aprobability that a linear block codeword is detected by error as anothercodeword after the channel transmission. A Binary Symmetric Channel(BSC) is taken as an example in following description.

The performance of g_(CRC16)(D)=D¹⁶+D¹²+D⁵+1 is illustrated in FIG. 2.In this figure, x-axis indicates an error probability (ε) in BSC, y-axisindicates a corresponding P_(ue). The four curves in this figurecorresponds to the cases A=16, 24, 32 and 48 respectively. From thisfigure, it is obviously seen: when ε is within the range [0.05, 0.3],P_(ue) is even greater than that when ε⁼0.5. This means that theperformance of the generation polynomial is very poor within the range.

SUMMARY OF THE INVENTION

The object of this invention is to provide an apparatus for appending aCRC in a communication system. With this apparatus, the CRC is appendedto transmitted data or signaling. If a length of the CRC-bit sequence is16, one of CRC generation polynomials listed below is adopted in presentapplication:

-   -   D¹⁶+D¹⁵+D¹²+D⁹+D⁶+D³+D²30 1    -   D¹⁶+D¹⁴+D¹³+D¹⁰+D⁷+D⁴+D+1    -   D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁸+D⁷+D⁶+D⁵+D⁴+D³+1    -   D¹⁶+D¹³+D¹²+D¹¹+D¹⁰+D⁹+D⁸+D⁵+D⁴+D²+D+1    -   D¹⁶+D¹⁵+D¹²+D¹⁰+D⁹+D⁸+D⁷+D⁶+D⁵+D³+D²+1    -   D¹⁶+D¹⁴+D¹³+D¹¹+D¹⁰+D⁹+D⁸+D⁷+D⁶+D⁴+D+1    -   D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1    -   D¹⁶+D¹²+D¹¹+D¹⁰+D⁹+D⁸+D⁷+D⁵+D⁴+D²+D+1

If the length of the CRC bit sequence is 18, one of the CRC generationpolynomials listed below is adopted in present application:

-   -   D¹⁸+D¹⁶+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+1    -   D¹⁸+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+D²30 1    -   D¹⁸+D¹⁶+D¹⁵+D¹²+D⁹+D⁸+D⁵30 1    -   D¹⁸+D¹³+D¹⁰+D⁹+D⁶+D³+D²+1    -   D¹⁸+D¹⁷+D¹¹+D¹⁰+D⁹+D⁸+D⁶+1    -   D¹⁸+D¹²+D¹⁰+D⁹+D⁸+D⁷+D+1    -   D¹⁸+D¹⁷+D¹⁶+D₁₄+D¹¹+D⁹+D⁸+D⁵+D³+1    -   D¹⁸+D¹⁵+D¹³+D¹⁰+D⁹+D⁷+D⁴+D²+D+1

If the length of the CRC bit sequence is 20, one of the CRC generationpolynomials listed below is adopted in present application:

-   -   D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D⁶+D⁴+1    -   D²⁰+D¹⁶+D¹⁴+D¹³+D¹²+D¹⁰+D⁹+D⁸+D⁶+D⁵+D³+D²+D+1    -   D²⁰+D¹⁹+D¹⁴+D¹³+D¹¹+D⁷+D⁶+D⁵+D³+D²+D+1    -   D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹³+D⁹+D⁷+D⁶+D+1    -   D²⁰+D¹⁸+D¹⁷+D¹⁶+D¹¹+D⁹+D⁸+D⁷+D⁶+D³+D²+1    -   D²⁰+D¹⁸+D¹⁷+D¹⁴+D¹³+D¹²+D¹¹+D⁹+D⁴+D³+D²+1    -   D²⁰+D¹⁹+D¹⁷+D¹³+D¹²+D¹⁰+D⁹+D⁸+D⁷+D⁶+D³+D²+D+1    -   D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁴+D¹³+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D³+D+1

With the optimized CRC generation polynomials proposed in presentinvention, mistakes in signaling detection can be effectively reduced sothat system spectrum utility can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a DCI processing flow;

FIG. 2 shows a performance of existing CRC generation polynomials;

FIG. 3 shows a performance of CRC generation polynomialD¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1;

FIG. 4 shows a flow of processing the 16-bit check information;

FIG. 5 shows a flow of processing the 18-bit or 20-bit checkinformation.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Suppose the load information for data or signaling is a₀, a₁, a₂, a₃, .. . , a_(A−1), and the CRC sequence to be appended to data or signalingis p₀, p₁, p₂, p₃, . . . , p_(L−1), where A indicates the length of theload information and L indicates the length of the check bit sequence(for the 16-bit check information, L=16; for the 18-bit checkinformation, L=18; and for the 20-bit check information, L=20). Thecheck-bit sequence is calculated with the method below: in GF(2), thepolynomial a₀D^(A+L−1)+a₁D^(A+L−2)+ . . .+a_(A−1)D^(L)+p₀D^(L−1)+p₁D^(L−2)+ . . . +p_(L−2)D¹+p_(L−1) is dividedby corresponding generation polynomials. And the remainders are zeros.Suppose the sequence appended with CRC is b₀, b₁, b₂, b₃, . . . ,b_(B−1), where B=A+L. Then the relationships between a_(k), b_(k) andp_(k) are as follows:

$\begin{matrix}{{b_{k} = {{a_{k}\mspace{14mu} k} = 0}},1,2,\ldots \mspace{14mu},{A - 1}} & \; \\{{b_{k} = {{p_{k - A}\mspace{14mu} k} = A}},{A + 1},\; {A + 2},\ldots \mspace{14mu},{A + L - 1}} & \;\end{matrix}$

Several optimized CRC generation polynomials that bear superiorperformance to existing one are proposed in present invention.

In the case that the length of the CRC bit sequence is 16, one of theCRC generation polynomials listed below is adopted in our application:

-   -   D¹⁶+D¹⁵+D¹²+D⁹+D⁶+D³+D²+1    -   D¹⁶+D¹⁴+D¹³+D¹⁰+D⁷+D⁴+D+1    -   D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁸+D⁷+D⁶+D⁵+D⁴+D³+1    -   D¹⁶+D¹³+D¹²+D¹¹+D¹⁰+D⁹+D⁸+D⁵+D⁴+D²+D+1    -   D¹⁶+D¹⁵+D¹²+D¹⁰+D⁹+D⁸+D⁷+D⁶+D⁵+D³+D²+1    -   D¹⁶+D¹⁴+D¹³+D¹¹+D¹⁰+D⁹+D⁸+D⁷+D⁶+D⁴+D+1    -   D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1    -   D¹⁶+D¹²+D¹¹+D¹⁰+D⁹+D⁸+D⁷+D⁵+D⁴+D²+D+1

In the case that the length of the CRC bit sequence is 18, one of theCRC generation polynomials listed below is adopted in our application:

-   -   D¹⁸+D¹⁶+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+1    -   D¹⁸+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+D²+1    -   D¹⁸+D¹⁶+D¹⁵+D¹²+D⁹+D⁸+D⁵+1    -   D¹⁸+D¹³+D¹⁰+D⁹+D⁶+D³+D²+1    -   D¹⁸+D¹⁷+D¹¹+D¹⁰+D⁹+D⁸+D⁶+1    -   D¹⁸+D¹²+D¹⁰+D⁹+D⁸+D⁷+D+1    -   D¹⁸+D¹⁷+D¹⁶+D¹⁴+D¹¹+D⁹+D⁸+D⁵+D³+1    -   D¹⁸+D₁₅+D¹³+D¹⁰+D⁹+D⁷+D⁴+D²+D+1

In the case that the length of the CRC bit sequence is 20, one of theCRC generation polynomials listed below is adopted in our application:

-   -   D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D⁶+D⁴+1    -   D²⁰+D¹⁶+D¹⁴+D¹³+D¹²+D¹⁰+D⁹+D⁸+D⁶+D⁵+D³+D²+D+1    -   D²⁰+D¹⁹+D¹⁴+D¹³+D¹¹+D⁷+D⁶+D⁵+D³+D²+D+1    -   D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹³+D⁹+D⁷+D⁶+D+1    -   D²⁰+D¹⁸+D¹⁷+D¹⁶+D¹¹+D⁹+D⁸+D⁷+D⁶+D³+D²+1    -   D²⁰+D¹⁸+D¹⁷+D¹⁴+D¹³+D¹²+D¹¹+D⁹+D⁴+D³+D²+1    -   D²⁰+D¹⁹+D¹⁷+D¹³+D¹²+D¹⁰+D⁹+D⁸+D⁷+D⁶+D³+D²+D+1    -   D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁴+D¹³+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D³+D+1

The CRC bit sequence with the length of 16 is taken as an example infollowing description. The 16-bit CRC generation polynomial bearssuperior performances to existing one g_(CRC16)(D)=D¹⁶+D¹²+D⁵+1. Thegeneration polynomial D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1 is takenas an example. Its performance is shown in FIG. 3. From this figure, itcan be seen that: the generation polynomial has no limitation existed ing_(CRC16)(D) (i.e., when ε is within the range [0.05, 0.3], P_(ue) iseven greater than the P_(ue) when ε=0.5). Meanwhile, from a comparisonbetween FIG. 2 and FIG. 3, it can be seen that: generation polynomialD¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1 bears significantly betterperformance than g_(CRC16)(D)=D¹⁶+D¹²+D⁵+1 (for the same A and ε, theless the P_(ue) is, the better the performance is.)

One application scenario is to apply present invention in datatransmission in a communication system. For example, in the case that abase station (BS) transmits data to a user equipment (UE) or UEtransmits data to a BS, if the length of the CRC bit sequence is 16, 18or 20, the CRC generation polynomials proposed in present invention canadopted for the invention.

Another application scenario is to apply present invention in thetransmission of control signaling in a communication system. In acommunication system, the BS controls resource allocation and thetransmitting and receiving for the to UEs by transmitting controlsignaling at each scheduling moment. In present invention, the controlsignaling for each UE is called a Physical Downlink Control Channel(PDCCH). And the load information in PDCCH is called a Downlink ControlInformation (DCI).

With the CRC generation polynomials proposed in present invention, amethod for transmitting control signaling includes steps of:

Step a) BS generating the check information on the control signalingaccording to the load information on the control signaling and theoptimized CRC generation polynomial.

Suppose the load information on the control signaling is a₀, a₁, a₂, a₃,. . . , a_(A−1), and the check-bit sequence generated according to theCRC generation polynomial is p₀, p₁, p₂, p₃, . . . , p_(L−1), where A isthe length of the load information, and L is the length of the check-bitsequence (for the 16-bit check information, L=16, for the 18-bit checkinformation, L=18, and for the 20-bit check information, L=20). Thecheck-bit sequence is calculated with the method below: in GF(2), thepolynomial a₀D^(A+L−1)+a₁D^(A+L−2)+ . . .+a_(A−1)D^(L)+p₀D^(L−1)+p₁D^(L−2)+ . . . 30 p_(L−2)D¹+p_(L−1) is dividedby corresponding generation polynomials. And the remainders are zeros.Suppose the sequence appended with CRC is b₀, b₁, b₂, b₃, . . . ,b_(B−1), where B=A+L. Then the relationships between a_(k), b_(k) andp_(k) are as follows:

$\begin{matrix}{{b_{k} = {{a_{k}\mspace{14mu} k} = 0}},1,2,\ldots \mspace{14mu},{A - 1}} & \; \\{{b_{k} = {{p_{k - A}\mspace{14mu} k} = A}},{A + 1},\; {A + 2},\ldots \mspace{14mu},{A + L - 1}} & \;\end{matrix}$

FIG. 4 shows a flow of processing the 16-bit check information. FIG. 5shows a flow of processing the 18-bit or 20-bit check information. Inthe case that the check information is 16 bits long, the operations instep a) correspond to that implemented in module 401 (CRC appending) inFIG. 4. In the case that the check information is 18 bits long or 20bits long, the operations in step a) correspond to that implemented inmodule 501 (CRC appending) in FIG. 5.

Step b) BS performing the scrambling operation on the check informationwith the information obtained according to UE ID.

In the case that the check information is 16 bits long, since UE IDbears the same length as the check information, BS directly performs thescrambling operation on the check information with the UE ID. Thisprocess is implemented in module 402 (scrambling) in FIG. 4. Details aredescribed as follows. Suppose the sequence appended with CRC is b₀, b₁,b₂, b₃, . . . , b_(B−1), where B=A+L with A indicating the length of theload information and L indicating the length of the check-bit sequence.Then sequence c₀, c₁, c₂, c₃, . . . , C_(B−1) obtained by scrambling theCRC bit sequence with the UE ID x_(ue.0), x_(ue.1), . . . , x_(ue.15).And the relationship between b_(k) and c_(k) is as follows:

$\begin{matrix}{{c_{k} = {{b_{k}\mspace{14mu} k} = 0}},1,2,\ldots \mspace{14mu},{A - 1}} & \; \\{{c_{k} = {{( {b_{k} + x_{{ue},\; {k - A}}} ){mod}\mspace{11mu} 2\mspace{14mu} k} = A}},{A + 1},\; {A + 2},\ldots \mspace{14mu},{A + 15}} & \;\end{matrix}$

In the case that the check information is 18 bits long or 20 bits long,since the UE ID is 16 bits long, it is necessary to expand the UE ID tobe the same length as the check information. One method is to performchannel coding to the UE ID. This process is implemented in module 504(channel coding 2) in FIG. 5. For example, the check information is 18bits long, the linear block code encoding scheme (18,16) can be adoptedhere to expand the UE ID to be a 18-bit codeword. In the case that thecheck information is 20 bits long, the linear block code encoding scheme(20,16) can be adopted to expand the UE ID to be a 20-bit codeword. Thesubsequent scrambling operation is implemented in module 502 (scramblingoperation) in FIG. 5. The details are as follows. Suppose the sequenceappended with CRC is b₀, b₁, b₂, b₃, . . . , b_(B−1), where B=A+L with Aindicating the length of the check information and L the length of thecheck-bit sequence. Suppose the UE ID x_(ue.0), x_(ue.1), . . . ,x_(ue.15) is encoded to be the sequence y₀, y₁, y₂, y₃, . . . , y_(L−1),the sequence c₀, c₁, c₂, c₃, . . . , c_(B−1) is obtained by scramblingoperation the CRC sequence with the information sequence y₀, y₁, y₂, y₃,. . . , y_(L−1) obtained according to UE ID. And the relationshipbetween b_(k) and c_(k) is as follows:

$\begin{matrix}{{c_{k} = {{b_{k}\mspace{14mu} k} = 0}},1,2,\ldots \mspace{14mu},{A - 1}} & \; \\{{c_{k} = {{( {b_{k} + y_{k - A}} ){mod}\mspace{11mu} 2\mspace{14mu} k} = A}},{A + 1},\; {A + 2},\ldots \mspace{14mu},{A + L - 1}} & \;\end{matrix}$

Step c) implementing operations of channel coding, rate matching on theload information and the scrambled information obtained in step b). Thenthe processed information is transmitted by the BS.

In this step, channel coding and rate matching are implemented by BS onthe scrambled information c₀, c₁, c₂, c₃, . . . , c_(B−1) obtained instep b) and then the processed information is transmitted. Here, aconvolution coding scheme or any other can be adopted.

In the case that the check information is 16 bits long, the operationsin step c) correspond to that operated in module 403 (channelcoding/rate matching) in FIG. 4. And in the case that the checkinformation is 18 or 20 bits long, the operations in step c) correspondto that operated in module 503 (channel coding/rate matching) in FIG. 5.

EMBODIMENTS

Four embodiments of the present invention are described in thefollowing. To avoid making the description too tedious, detaileddescriptions for functions or equipments well known are omitted.

A First Embodiment

In this embodiment, the transmission control signaling shares the samelength with the check information, i.e., 16 bits. Suppose the adoptedCRC generation polynomial is D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1,and the UE ID is x_(ue.0), x_(ue.1), . . . , x_(ue.15)=1000110000101111,the load information on the control signaling is the 20-bit sequence a₀,a₁, a₂, a₃, . . . , a₁₉=00011111001010011110. Please be noted that allthese settings are only done for the convenience of description. Anyother of the CRC generation polynomials proposed in present invention,UE IDs, and load information sequences of control signaling can beapplied.

The check-bit sequence generated according to the load information onthe control signaling and the optimized CRC generation polynomial is p₀,p₁, p₂, p₃, . . . , p₁₅=0001010000000001. Then the sequence appendedwith CRC is b₀, b₁, b₂, b₃, . . . ,b₃₅=000111110010100111100001010000000001. The scrambling operation isperformed on the CRC bit sequence with the UE ID to obtain a scrambledsequence c₀, c₁, c₂, c₃, . . . ,c₃₅=000111110010100111101001100000101110. Then, operations of channelcoding and rate matching are performed by BS on sequence c₀, c₁, c₂, c₃,. . . , c₃₅. And the processed information is finally transmitted.

A Second Embodiment

In this embodiment, the transmission control signaling shares the samelength with the check information, i.e., 18 bits. Suppose the adoptedCRC generation polynomial is D¹⁸+D¹⁶+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+1, and the UE IDis x_(ue.0, x) _(ue.1), . . . , x_(ue.15)=1000110000101111 the loadinformation on the control signaling is the 20-bit sequence a₀, a₁, a₂,a₃, . . . , a₁₉=00011111001010011110. Please be noted that all thesesettings are only done for the convenience of description. Any other ofthe CRC generation polynomials proposed in present invention, UE IDs,and load information sequences of control signaling can be applied.

The check-bit sequence generated according to the load information onthe control signaling and the optimized CRC generation polynomial is p₀,p₁, p₂, p₃, . . . , p₁₇=111010001110001111. Then the sequence appendedwith CRC is b₀, b₁, b₂, b₃, . . . ,b₃₇=00011111001010011110111010001110001111. By systematic linear blockcoding, the UE ID x_(ue.0), x_(ue.1), . . . , x_(ue.15) is converted tothe sequence y₀, y₁, y₂, y₃, . . . , y₁₇. The coding rule is as follows:

y_(k) = x_(ue, k  )k = 0, 1, 2, …  , 15$y_{16} = {( {\sum\limits_{k = 0}^{7}x_{{ue},\; k}} ){mod}\mspace{14mu} 2}$$y_{17} = {( {\sum\limits_{k = 8}^{7}x_{{ue},\; k}} ){mod}\mspace{14mu} 2}$

Therefore by the UE ID x_(ue.0), x_(ue.1), . . . ,x_(ue.15)=1000110000101111, the encoded sequence y₀, y₁, y₂, y₃, . . . ,y₁₇=100011000010111111 can be obtained. The scrambling operation isperformed on CRC bit sequence with sequence y₀, y₁, y₂, y₃, . . . , y₁₇to obtain sequence c₀, c₁, c₂, c₃, . . . ,c₃₇=00011111001010011110011001001100110000. Then, operations likechannel coding and rate matching are performed by BS on the sequence c₀,c₁, c₂, c₃, . . . , c₃₇. And the processed information is finallytransmitted.

A Third Embodiment

In this embodiment, the transmission control signaling shares the samelength with the check information, i.e., 20 bits. Suppose the adoptedCRC generation polynomial isD²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D⁶+D⁴+1, and the UE ID isx_(ue.0), Xx_(ue.1), . . . , x_(ue.15)=1000110000101111, the loadinformation on the control signaling is the 20-bit sequence=a₀, a₁, a₂,a₃, . . . , a₁₉=00011111001010011110. Please be noted that all thesesettings are only done for the convenience of description. Any other ofthe CRC generation polynomials proposed in present invention, UE IDs,and load information sequences of control signaling can be applied.

The check-bit sequence generated according to the load information onthe control signaling and the optimized CRC generation polynomial is p₀,p₁, p₂, p₃, . . . , p₁₉=10110010110010001100. Then the sequence appendedwith CRC is b₀, b₁, b₂, b₃, . . . ,b₃₉=0001111100101001111010110010110010001100. By systematic linear blockcoding, the UE ID x_(ue.0), x_(ue.1), . . . , x_(ue.15) is converted tothe sequence y₀, y₁, y₂, y₃, . . . , y₁₉. The coding rule is as follows:

y_(k) = x_(ue, k)  k = 0, 1, 2, …  , 15$y_{16} = {( {\sum\limits_{k = 0}^{3}x_{{ue},\; k}} )\; {mod}\mspace{11mu} 2}$$y_{17} = {( {\sum\limits_{k = 14}^{7}x_{{ue},\; k}} )\; {mod}\mspace{11mu} 2}$$y_{18} = {( {\sum\limits_{k = 8}^{L}x_{{ue},\; k}} )\; {mod}\mspace{11mu} 2}$$y_{19} = {( {\sum\limits_{k = 12}^{L}x_{{ue},\; k}} )\; {mod}\mspace{11mu} 2}$

So, by the UE ID x_(ue.0), x_(ue.1), . . . , x_(ue.15)=1000110000101111,the encoded sequence y₀, y₁, y₂, y₃, . . . , y₁₉=10001100001011111010 isobtained. The scrambling operation is performed on the CRC bit sequencewith sequence y₀, y₁, y₂, y₃, . . . , y₁₉ to obtain sequence c₀, c₁, c₂,c₃, . . . , c₃₉=0001111100101001111000111110111001110110. Then,operations of channel coding and rate matching are performed by BS tosequence c₀, c₁, c₂, c₃, . . . , c₃₉. And the processed information isfinally transmitted.

A Fourth Embodiment

This embodiment corresponds to the case of data transmission. Forexample, in the case that BS transmits data to UE or UE transmits datato BS, if the CRC sequence is 16, 18 or 20 bits long, the CRC generationpolynomials proposed in present invention can be applied here. Forexample: in the case that the CRC sequence is 16 bits long, thegeneration polynomial D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1 can beapplied; and in the case that the CRC sequence is 18 bits long, thegeneration polynomial D¹⁸ +D¹⁶+D¹⁴+D¹⁰+D⁹+D⁸+D⁴D+1 can be applied; andin the case that the CRC sequence is 20 bits long, the generationpolynomial D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵D¹⁴+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D⁶+D⁴+1 can beapplied.

While the invention has been shown and described with reference tocertain exemplary embodiments of the present invention thereof, it willbe understood by those skilled in the art that various changes in formand details may be made therein without departing from the spirit andscope of the present invention as defined by the appended claims andtheir equivalents.

1. An apparatus for appending Cyclic Redundancy Check to data orsignaling to be transmitted in a communication system, wherein if alength of a CRC-bit sequence is 16, one of the CRC generationpolynomials listed below is adopted: D¹⁶+D¹⁵+D¹²+D⁹+D⁶+D³+D²+1D¹⁶+D¹⁴+D¹³+D¹⁰+D⁷+D⁴+D+1 D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁸+D⁷+D⁶+D⁵+D⁴+D³+1D¹⁶+D¹³+D¹²+D¹¹+D¹⁰+D⁹+D⁸+D⁵+D⁴+D²+D+1D¹⁶+D¹⁵+D¹²+D¹⁰+D⁹+D⁸+D⁷+D⁶+D⁵+D³+D²+1D¹⁶+D¹⁴+D¹³+D¹¹+D¹⁰+D⁹+D⁸+D₇+D₆+D₄+D+1D¹⁶+D¹⁵+D¹⁴+D¹²+D¹¹+D⁹+D⁸+D⁷+D⁶+D⁵+D⁴+1D¹⁶+D¹²+D¹¹+D¹⁰+D⁹+D⁸+D⁷+D⁵+D⁴+D²+D+1; if if the length of the CRC bitsequence is 18, one of the CRC generation polynomials listed below isadopted: D¹⁸+D¹⁶+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+1 D¹⁸+D¹⁴+D¹⁰+D⁹+D⁸+D⁴+D²+1D¹⁸+D¹⁶+D¹⁵+D¹²+D⁹+D⁸+D⁵+1 D¹⁸+D¹³+D¹⁰+D⁹+D⁶+D³+D²+1D¹⁸+D¹⁷+D¹¹+D¹⁰+D⁹+D⁸+D⁶+1 D¹⁸+D¹²+D¹⁰+D⁹+D⁸+D⁷+D+1D¹⁸+D¹⁷+D¹⁶+D¹⁴+D¹¹+D⁹+D⁸+D⁵+D³+1 D¹⁸+D¹⁵+D¹³+D¹⁰+D⁹+D⁷+D⁴+D²+D+1; ifthe length of the CRC bit sequence is 20, one of the CRC generationpolynomials listed below is adopted:D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D⁶+D⁴+1D²⁰+D¹⁶+D¹⁴+D¹³+D¹²+D¹⁰+D⁹+D⁸+D⁶+D⁵+D³+D²+D+1D²⁰+D¹⁹+D¹⁴+D¹³+D¹¹+D⁷+D⁶+D⁵+D³+D²+D+1D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁵+D¹⁴+D¹³+D⁹+D⁷+D⁶+D+1D²⁰+D¹⁸+D¹⁷+D¹⁶+D¹¹+D⁹+D⁸+D⁷+D⁶+D³+D²+1D²⁰+D¹⁸+D¹⁷+D¹⁴+D¹³+D¹²+D¹¹+D⁹+D⁴+D³+D²+1D²⁰+D¹⁹+D¹⁷+D¹³+D¹²+D¹⁰+D⁹+D⁸+D⁷+D⁶+D³+D²+D+1D²⁰+D¹⁹+D¹⁸+D¹⁷+D¹⁴+D¹³+D¹²+D¹¹+D¹⁰+D⁸+D⁷+D³+D+1.
 2. The apparatusaccording to claim 1, wherein the apparatus is configured to a) generatecheck information on a control signaling according to load informationon the control signaling and a optimized CRC generation polynomial; b)perform scrambling operation on the check information with informationobtained according to UE ID; c) implement operations of channel coding,rate matching on the load information and the scrambled informationobtained in step b), then transmitting the processed information.
 3. Theapparatus according to claim 2, wherein the control signaling is calleda physical downlink control channel (PDCCH).
 4. The apparatus accordingto claim 2, wherein the load information is downlink control information(DCI).
 5. The apparatus according to claim 2, wherein the length of thecheck information is 16 bits.
 6. The apparatus according to claim 2,wherein a BS directly scrambles the check information with the UE ID. 7.The apparatus according to claim 2, wherein the length of the checkinformation is 18 bits.
 8. The apparatus according to claim 2, wherein aBS encodes the UE ID to be a 18-bit codeword, and then scrambles theprocessed UE ID with the check information.
 9. The apparatus accordingto claim 2, wherein the length of the check information is 20 bits. 10.The apparatus according to claim 2, wherein a BS encodes the UE ID to bea 20-bit codeword, and then scrambles the processed UE ID with the checkinformation.